1. Field of the Invention
The present invention generally relates to a semiconductor device. More specifically, the invention relates to the structure of a trench gate type n-channel field effect transistor wherein a schottky-barrier diode is mounted in the same semiconductor substrate.
2. Related Background Art
FIG. 1 is a circuit diagram of a typical synchronous commutating circuit in which a field effect transistor is used.
The synchronous commutating circuit shown in FIG. 1 comprises: a first field effect transistor FET1 and a second field effect transistor FET2, which are connected in series between a power supply potential node VDD and a ground potential node; a schottky-barrier diode SBD which is connected to the second field effect transistor FET2 in parallel; an inductance L which is connected to a connection node of the first field effect transistor FET1 and the second field effect transistor FET2 and to an output node OUT; and a capacitor C which is connected to the output node OUT and a ground potential node. Furthermore, reference symbol D1 and D2 denote parasitic diodes of the first and second field effect transistors FET1 and FET2, respectively.
This synchronous commutating circuit is designed to alternately the potential level of the output node OUT by alternately applying a voltage to the gate of the first field effect transistor FET1 or the second field effect transistor FET2.
It is herein assumed that the schottky-barrier diode SBD is not provided, after the gate of the first field effect transistor FE1 is turned off, before the gate of the second field effect transistor FET2 is turned on, a forward current flows through the parasitic diode D2 of the second field effect transistor FET2 by the counter electromotive force of the inductance L, so that a relatively large power loss is caused.
Therefore, in order to reduce this power loss, there are some cases where a schottky-barrier diode SBD is provided between the source and drain of the second field effect transistor FET2.
FIG. 2 is a plan view showing a schematic construction on a semiconductor substrate when a field effect transistor and a schottky-barrier diode are mounted on the same substrate.
When the field effect transistor and the schottky-barrier diode are mounted on the same substrate, a schottky-barrier diode region 6 and a field effect transistor region 7 are separated from each other as shown in FIG. 2. On the other hand, the anode electrode of the schottky-barrier diode and the source electrode of the field effect transistor are formed of a common metal film 1. Furthermore, a gate electrode pad 14 is provided in a corner portion of the semiconductor substrate.
FIG. 3 is a cross-sectional construction drawing of a conventional semiconductor device wherein a field effect transistor and a schottky-barrier diode are mounted on the same substrate. Furthermore, the cross-section shown in FIG. 3 is a cross-section taken along line AA′ in the semiconductor device shown in FIG. 2.
The conventional semiconductor device shown in FIG. 3 comprises: an n++-type semiconductor substrate 12; an n+-type epitaxial layer (semiconductor layer) 9 which is a drift layer formed on the n++-type semiconductor substrate 12; a p-type base layer 8 which is formed in the vicinity of the surface in a field effect transistor region 7 of the n+-type epitaxial layer 9; an n+-type source layer 5 which is formed in the surface portion of the p-type base layer 8; a gate oxide film (gate insulating film) 11 formed on the bottom and inside surfaces of a trench which is dug from the surface of n+-type source layer 5 to the upper layer portion of the n+-type epitaxial layer 9; a gate electrode 10 formed in the trench, on the bottom and inside surfaces of which the gate oxide film 11 is formed; an interlayer insulating film 3 which is formed on the gate electrode 10; a p-type base layer 18 which is formed as a guard ring on the surface portion of the n+-type epitaxial layer 9 along the peripheral edge portion of the schottky-barrier diode region 6 on the side of the edge portion of the substrate; an oxide film (insulating film) 4 which is formed so as to cover a connecting portion of the n+-type epitaxial layer 9 to the p-type base layer 18 on the side of the peripheral edge portion of the n+-type epitaxial layer 9; a barrier metal 2 which is formed on the surface in the field effect transistor region 7 and schottky-barrier diode region 6; a metal film 1 which is formed as source and anode electrodes on the surface of the barrier metal 2; and a metal film 13 which is formed as drain and cathode electrodes on the reverse of the n++-type semiconductor substrate 12.
The structure of the semiconductor device shown in FIGS. 2 and 3 is a typical structure when the field effect transistor and schottky-barrier diode of the synchronous commutating circuit shown in FIG. 1 are formed on the same substrate.
However, in the structure of the conventional semiconductor device shown in FIGS. 2 and 3, if an inverse bias voltage is applied between the source and drain, i.e., between the anode and cathode, an excessive electric field may be applied to a depletion layer in the guard ring portion of the schottky-barrier diode region 6, i.e., around the p-type base layer 18, to cause a voltage breakdown, so that there is a problem in that the backward withstand voltage is lower than that of a single element in the field effect transistor region 7.
On the other hand, in order to improve the backward withstand voltage in the structure of the conventional semiconductor device, there is considered a means for enhancing the specific resistance of the drift layer (n+-type epitaxial layer 9). If such a means is provided, the on resistance during the forward bias of the field effect transistor increases, so that the problem can not fundamentally be solved.